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139
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SPAA
2006
ACM
15 years 9 months ago
Modeling instruction placement on a spatial architecture
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...
160
Voted
DATE
2005
IEEE
154views Hardware» more  DATE 2005»
15 years 9 months ago
Secure Embedded Processing through Hardware-Assisted Run-Time Monitoring
— Security is emerging as an important concern in embedded system design. The security of embedded systems is often compromised due to vulnerabilities in “trusted” software t...
Divya Arora, Srivaths Ravi, Anand Raghunathan, Nir...
134
Voted
SIGCSE
2005
ACM
146views Education» more  SIGCSE 2005»
15 years 9 months ago
Using image processing projects to teach CS1 topics
As Computer Science educators, we know that students learn more from projects that are fun and challenging, that seem “real” to them, and that allow them to be creative in des...
Richard Wicentowski, Tia Newhall
135
Voted
LCPC
2005
Springer
15 years 9 months ago
Compiler Supports and Optimizations for PAC VLIW DSP Processors
Abstract. Compiler is substantially regarded as the most essential component in the software toolchain to promote a successful processor design. This paper describes our preliminar...
Yung-Chia Lin, Chung-Lin Tang, Chung-Ju Wu, Ming-Y...
153
Voted
ISPD
2004
ACM
146views Hardware» more  ISPD 2004»
15 years 9 months ago
Power-aware clock tree planning
Modern processors and SoCs require the adoption of poweroriented design styles, due to the implications that power consumption may have on reliability, cost and manufacturability ...
Monica Donno, Enrico Macii, Luca Mazzoni
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