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ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
15 years 8 months ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
CODES
2008
IEEE
15 years 3 months ago
Methodology for multi-granularity embedded processor power model generation for an ESL design flow
With power becoming a major constraint for multi-processor embedded systems, it is becoming important for designers to characterize and model processor power dissipation. It is cr...
Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi,...
ICIP
2008
IEEE
16 years 5 months ago
Efficient representation and coding of prediction residuals and parameters in frame-based animated mesh compression
For compression of 3-D dynamic meshes, the novel framework of so-called frame-based animated mesh compression (FAMC) has been introduced recently. In this context, we propose an e...
Detlev Marpe, Heiner Kirchhoffer, Karsten Mül...
DCC
2008
IEEE
15 years 10 months ago
Shared Descriptions Fusion Coding for Storage and Selective Retrieval of Correlated Sources
Motivated by sensor networks, we consider the fusion storage of correlated sources in a database, such that any subset of them may be efficiently retrieved in the future. Only st...
Sharadh Ramaswamy, Kenneth Rose
ICC
2008
IEEE
199views Communications» more  ICC 2008»
15 years 10 months ago
Lower-Complexity Layered Belief-Propagation Decoding of LDPC Codes
Abstract— The design of LDPC decoders with low complexity, high throughput, and good performance is a critical task. A well-known strategy is to design structured codes such as q...
Yuan-Mao Chang, Andres I. Vila Casado, Mau-Chung F...