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IESS
2007
Springer
92views Hardware» more  IESS 2007»
15 years 10 months ago
An Interactive Model Re-Coder for Efficient SoC Specification
To overcome the complexity in System-on-Chip (SoC) design, researchers have developed sophisticated design flows that significantly reduce the development time through automation...
Pramod Chandraiah, Rainer Dömer
CODES
2003
IEEE
15 years 9 months ago
RTOS scheduling in transaction level models
the level of abstraction in system design promises to enable faster exploration of the design space at early stages. While scheduling decision for embedded software has great impa...
Haobo Yu, Andreas Gerstlauer, Daniel Gajski
CGO
2005
IEEE
15 years 10 months ago
A General Compiler Framework for Speculative Optimizations Using Data Speculative Code Motion
Data speculative optimization refers to code transformations that allow load and store instructions to be moved across potentially dependent memory operations. Existing research w...
Xiaoru Dai, Antonia Zhai, Wei-Chung Hsu, Pen-Chung...
DATE
2010
IEEE
107views Hardware» more  DATE 2010»
15 years 9 months ago
An error-correcting unordered code and hardware support for robust asynchronous global communication
A new delay-insensitive data encoding scheme for global asynchronous communication is introduced. The goal of this work is to combine the timing-robustness of delay-insensitive (i....
Melinda Y. Agyekum, Steven M. Nowick
MM
2010
ACM
125views Multimedia» more  MM 2010»
15 years 4 months ago
Tenor: making coding practical from servers to smartphones
It has been theoretically shown that performing coding in networked systems, including Reed-Solomon codes, fountain codes, and random network coding, has a clear advantage with re...
Hassan Shojania, Baochun Li