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ISPAN
1996
IEEE
15 years 9 months ago
Design and evaluation of an environment APE for automatic parallelization of programs
In this paper, we have presented the design and evaluation of a compiler system, called APE,for automatic parallelization of scientific and engineering applications on distributed...
Vipin Chaudhary, Cheng-Zhong Xu, Sumit Roy, Jialin...
ISCAS
1994
IEEE
138views Hardware» more  ISCAS 1994»
15 years 9 months ago
High-Throughput Data Compressor Designs Using Content Addressable Memory
This paper presents a novel VLSI architecture for high-speed data compressor designs which implement the well-known LZ77 algorithm. The architecture mainly consists of three units...
Ren-Yang Yang, Chen-Yi Lee
CASES
2007
ACM
15 years 9 months ago
Application driven embedded system design: a face recognition case study
The key to increasing performance without a commensurate increase in power consumption in modern processors lies in increasing both parallelism and core specialization. Core speci...
Karthik Ramani, Al Davis
129
Voted
DSD
2004
IEEE
136views Hardware» more  DSD 2004»
15 years 8 months ago
FPGA Based Design of the Railway's Interlocking Equipments
This paper describes the architecture of a safety system of the railway's interlocking equipment, which has been developed for Czech railways. The system will be used for the...
Radek Dobias, Hana Kubatova
ISLPED
1995
ACM
95views Hardware» more  ISLPED 1995»
15 years 8 months ago
Reducing the frequency of tag compares for low power I-cache design
In current processors, the cache controller, which contains the cache directory and other logic such as tag comparators, is active for each instruction fetch and is responsible fo...
Ramesh Panwar, David A. Rennels