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DATE
2010
IEEE
163views Hardware» more  DATE 2010»
15 years 10 months ago
Efficient High-Level modeling in the networking domain
-- Starting Electronic System Level (ESL) design flows with executable High-Level Models (HLMs) has the potential to sustainably improve productivity. However, writing good HLMs fo...
Christian Zebelein, Joachim Falk, Christian Haubel...
156
Voted
COMPGEOM
1999
ACM
15 years 10 months ago
Folding Flat Silhouettes and Wrapping Polyhedral Packages: New Results in Computational Origami
We show a remarkable fact about folding paper: From a single rectangular sheet of paper, one can fold it into a flat origami that takes the (scaled) shape of any connected polygo...
Erik D. Demaine, Martin L. Demaine, Joseph S. B. M...
VLSID
2002
IEEE
174views VLSI» more  VLSID 2002»
16 years 6 months ago
Architecture Implementation Using the Machine Description Language LISA
The development of application specific instruction set processors comprises several design phases: architecture exploration, software tools design, system verification and design...
Oliver Schliebusch, Andreas Hoffmann, Achim Nohl, ...
136
Voted
FDL
2004
IEEE
15 years 10 months ago
Predictability in Real-time System Development (2) A Case Study
In a companion paper [HVV04], we have investigated the deficiency of existing design approaches in supporting predictability for real-time control system development. A design app...
Jinfeng Huang, Jeroen Voeten, Piet van der Putten,...
ISQED
2007
IEEE
141views Hardware» more  ISQED 2007»
16 years 13 days ago
OPC-Friendly Bus Driven Floorplanning
In this paper, we address the interconnect-driven floorplanning problem that integrates OPC-friendly bus assignment with floorplanning. Buses consist of a number of horizontal/v...
Hua Xiang, Liang Deng, Li-Da Huang, Martin D. F. W...