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» Connecting a Logical Framework to a First-Order Logic Prover
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BCS
2008
15 years 1 months ago
Hardware Dependability in the Presence of Soft Errors
Using formal verification for designing hardware designs free from logic design bugs has been an active area of research since the last 15 years. Technology has matured and we hav...
Ashish Darbari, Bashir M. Al-Hashimi
PPDP
2005
Springer
15 years 5 months ago
Formal validation of pattern matching code
When addressing the formal validation of generated software, two main alternatives consist either to prove the correctness of compilers or to directly validate the generated code....
Claude Kirchner, Pierre-Etienne Moreau, Antoine Re...
CDES
2008
90views Hardware» more  CDES 2008»
15 years 1 months ago
Nanocompilation for the Cell Matrix Architecture
- The Cell Matrix Architecture is a massive array of dynamically self-configurable, uniformly connected, identical computational units. This architecture can enable efficient, prac...
Thomas Way, Rushikesh Katikar, Ch. Purushotham
PTS
2008
109views Hardware» more  PTS 2008»
15 years 1 months ago
Runtime Verification of C Programs
We present in this paper a framework, RMOR, for monitoring the execution of C programs against state machines, expressed in a textual (nongraphical) format in files separate from t...
Klaus Havelund
CDC
2010
IEEE
272views Control Systems» more  CDC 2010»
14 years 6 months ago
Node capture attacks in wireless sensor networks: A system theoretic approach
In this paper we address the problem of physical node capture attacks in wireless sensor networks and provide a control theoretic framework to model physical node capture, cloned n...
Tamara Bonaci, Linda Bushnell, Radha Poovendran