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FPL
2005
Springer
98views Hardware» more  FPL 2005»
15 years 3 months ago
Using DSP Blocks For ROM Replacement: A Novel Synthesis Flow
This paper describes a method based on polynomial approximation for transferring ROM resources used in FPGA designs to multiplication and addition operations. The technique can be...
Gareth W. Morris, George A. Constantinides, Peter ...
MICRO
2012
IEEE
231views Hardware» more  MICRO 2012»
13 years 4 days ago
What is Happening to Power, Performance, and Software?
The past 10 years have delivered two significant revolutions. (1) Microprocessor design has been transformed by the limits of chip power, wire latency, and Dennard scaling—leadi...
Hadi Esmaeilzadeh, Ting Cao, Xi Yang, Stephen Blac...
CDC
2010
IEEE
138views Control Systems» more  CDC 2010»
14 years 4 months ago
Sensor-based robot deployment algorithms
Abstract-- In robot deployment problems, the fundamental issue is to optimize a steady state performance measure that depends on the spatial configuration of a group of robots. For...
Jerome Le Ny, George J. Pappas
DATE
2009
IEEE
163views Hardware» more  DATE 2009»
15 years 4 months ago
Fixed points for multi-cycle path detection
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...
Vijay D'Silva, Daniel Kroening
ICCAD
2009
IEEE
159views Hardware» more  ICCAD 2009»
14 years 7 months ago
First steps towards SAT-based formal analog verification
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
Saurabh K. Tiwary, Anubhav Gupta, Joel R. Phillips...