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» Considerations for the design of exergames
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109
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LCPC
2005
Springer
15 years 3 months ago
Software Thread Level Speculation for the Java Language and Virtual Machine Environment
Thread level speculation (TLS) has shown great promise as a strategy for fine to medium grain automatic parallelisation, and in a hardware context techniques to ensure correct TLS...
Christopher J. F. Pickett, Clark Verbrugge
96
Voted
NORDICHI
2004
ACM
15 years 3 months ago
Survey on the UCD integration in the industry
The primary contribution of this paper is investigating how the User Centered Design approach is integrated into the industry. Employing a structured web-survey, targeted to the u...
Giorgio Venturi, Jimmy Troost
80
Voted
FPL
2004
Springer
90views Hardware» more  FPL 2004»
15 years 3 months ago
Run-Time-Conscious Automatic Timing-Driven FPGA Layout Synthesis
Abstract. Layout tools for FPGAs can typically be run in two different modes: non-timing-driven and timing-driven. Non-timing-driven mode produces a solution quickly, without consi...
Jason Helge Anderson, Sudip Nag, Kamal Chaudhary, ...
91
Voted
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
15 years 3 months ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
81
Voted
ISPD
2003
ACM
105views Hardware» more  ISPD 2003»
15 years 3 months ago
Partition-driven standard cell thermal placement
The thermal problem has been emerged as one of the key issues for next-generation IC design. In this paper, we propose a scheme to achieve better thermal distribution for partitio...
Guoqiang Chen, Sachin S. Sapatnekar