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ASPDAC
2001
ACM
94views Hardware» more  ASPDAC 2001»
15 years 1 months ago
On speeding up extended finite state machines using catalyst circuitry
We propose a timing optimization technique for a complex finite state machine that consists of not only random logic but also data operators. In such a design, the timing critical...
Shi-Yu Huang
TREC
2008
14 years 11 months ago
Polarity Classification of Blog TREC 2008 Data with a Geodesic Kernel
In this paper we describe the TNO approach to large-scale polarity classification of the Blog TREC 2008 dataset. Our participation consists of the submission of the 5 baseline run...
Stephan Raaijmakers, Wessel Kraaij
CORR
2008
Springer
101views Education» more  CORR 2008»
14 years 10 months ago
Cognitive networks achieve throughput scaling of a homogeneous network
We study two distinct, but overlapping, networks which operate at the same time, space and frequency. The first network consists of
Sang-Woon Jeon, Natasha Devroye, Mai Vu, Sae-Young...
TVLSI
2008
123views more  TVLSI 2008»
14 years 9 months ago
Cost-Efficient SHA Hardware Accelerators
Abstract--This paper presents a new set of techniques for hardware implementations of Secure Hash Algorithm (SHA) hash functions. These techniques consist mostly in operation resch...
Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Sta...
CORR
2000
Springer
132views Education» more  CORR 2000»
14 years 9 months ago
Declarative Representation of Revision Strategies
Abstract. We introduce a nonmonotonic framework for belief revision in which reasoning about the reliability of different pieces of information based on meta-knowledge about the in...
Gerhard Brewka