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ICCD
2006
IEEE
128views Hardware» more  ICCD 2006»
15 years 6 months ago
Polaris: A System-Level Roadmap for On-Chip Interconnection Networks
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin ...
ICCAD
2006
IEEE
123views Hardware» more  ICCAD 2006»
15 years 6 months ago
A network-flow approach to timing-driven incremental placement for ASICs
We present a novel incremental placement methodology called FlowPlace for significantly reducing critical path delays of placed standard-cell circuits. FlowPlace includes: a) a t...
Shantanu Dutt, Huan Ren, Fenghua Yuan, Vishal Suth...
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ICCAD
2006
IEEE
112views Hardware» more  ICCAD 2006»
15 years 6 months ago
A new RLC buffer insertion algorithm
Most existing buffering algorithms neglect the impact of inductance on circuit performance, which causes large error in circuit analysis and optimization. Even for the approaches...
Zhanyuan Jiang, Shiyan Hu, Jiang Hu, Zhuo Li, Weip...
ICCAD
2005
IEEE
117views Hardware» more  ICCAD 2005»
15 years 6 months ago
IMF: interconnect-driven multilevel floorplanning for large-scale building-module designs
Abstract— We present in this paper a new interconnect-driven multilevel floorplanning, called IMF, to handle large-scale building-module designs. Unlike the traditional multilev...
Tung-Chieh Chen, Yao-Wen Chang, Shyh-Chang Lin
EUROGRAPHICS
2010
Eurographics
15 years 5 months ago
Tetrahedral Embedded Boundary Methods for Accurate and Flexible Adaptive Fluids
When simulating fluids, tetrahedral methods provide flexibility and ease of adaptivity that Cartesian grids find difficult to match. However, this approach has so far been lim...
Christopher Batty, Stefan Xenos, Ben Houston
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