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DFT
2003
IEEE
113views VLSI» more  DFT 2003»
15 years 6 months ago
Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip
Test scheduling and Test Access Mechanism (TAM) design are two important tasks in the development of a System-on-Chip (SOC) test solution. Previous test scheduling techniques assu...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
EMSOFT
2009
Springer
15 years 7 months ago
Cache-aware scheduling and analysis for multicores
The major obstacle to use multicores for real-time applications is that we may not predict and provide any guarantee on real-time properties of embedded software on such platforms...
Nan Guan, Martin Stigge, Wang Yi, Ge Yu
DSL
2009
14 years 11 months ago
Operator Language: A Program Generation Framework for Fast Kernels
Abstract. We present the Operator Language (OL), a framework to automatically generate fast numerical kernels. OL provides the structure to extend the program generation system Spi...
Franz Franchetti, Frédéric de Mesmay...
EUROSYS
2009
ACM
15 years 10 months ago
Orchestra: intrusion detection using parallel execution and monitoring of program variants in user-space
In a Multi-Variant Execution Environment (MVEE), several slightly different versions of the same program are executed in lockstep. While this is done, a monitor compares the behav...
Babak Salamat, Todd Jackson, Andreas Gal, Michael ...
CPAIOR
2007
Springer
15 years 7 months ago
On Boolean Functions Encodable as a Single Linear Pseudo-Boolean Constraint
A linear pseudo-Boolean constraint (LPB) is an expression of the form a1 · 1 + . . . + am · m ≥ d, where each i is a literal (it assumes the value 1 or 0 depending on whether a...
Jan-Georg Smaus