6554 search results - page 1069 / 1311 » Constraint Logic Programming |
146
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ICCAD
2004
IEEE
16 years 1 months ago
2004
IEEE
Power is an increasingly important design constraint for FPGAs in nanometer technologies. Because interconnect power is dominant in FPGAs, we design Vdd-programmable interconnect ...
126
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ICCAD
2004
IEEE
16 years 1 months ago
2004
IEEE
Improving logic capacity by time-sharing, dynamically reconfigurable FPGAs are employed to handle designs of high complexity and functionality. In this paper, we model each task ...
142
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PERCOM
2009
ACM
15 years 11 months ago
2009
ACM
—Ensuring spontaneous ad hoc interoperation in decentralized ubiquitous computing environments is challenging, because of heterogeneous resources and divergent policies. Centrali...
146
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GLVLSI
2009
IEEE
15 years 11 months ago
2009
IEEE
The sequential depth determines the completeness of bounded model checking in design verification. Recently, a SATbased method is proposed to compute the sequential depth of a de...
149
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TIME
2009
IEEE
15 years 11 months ago
2009
IEEE
Morris, Muscettola and Vidal (MMV) presented an algorithm for checking the dynamic controllability (DC) of temporal networks in which certain temporal durations are beyond the con...