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143
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ASPDAC
2007
ACM
140views Hardware» more  ASPDAC 2007»
15 years 7 months ago
An Architecture for Combined Test Data Compression and Abort-on-Fail Test
1 The low throughput at IC (Integrated Circuit) testing is mainly due to the increasing test data volume, which leads to high ATE (Automatic Test Equipment) memory requirements and...
Erik Larsson, Jon Persson
147
Voted
CASSIS
2004
Springer
15 years 7 months ago
Verification of Safety Properties in the Presence of Transactions
The JAVA CARD transaction mechanism can ensure that a sequence of statements either is executed to completion or is not executed at all. Transactions make verification of JAVA CARD...
Reiner Hähnle, Wojciech Mostowski
154
Voted
APSCC
2006
IEEE
15 years 7 months ago
A Model-Driven Aspect Framework for Grid Service Development
Service-Oriented Architecture (SOA) plays an important role in the next generation computing models for scientific and commercial applications. But difficulties in the development...
WenJun Li, ChuWei Huang, QiangChao Chen, Hui Bian
148
Voted
ASIAN
2006
Springer
118views Algorithms» more  ASIAN 2006»
15 years 7 months ago
An Approach to Formal Verification of Arithmetic Functions in Assembly
Abstract. It is customary to write performance-critical parts of arithmetic functions in assembly: this enables finely-tuned algorithms that use specialized processor instructions....
Reynald Affeldt, Nicolas Marti
146
Voted
DAC
2004
ACM
15 years 7 months ago
Probabilistic regression suites for functional verification
Random test generators are often used to create regression suites on-the-fly. Regression suites are commonly generated by choosing several specifications and generating a number o...
Shai Fine, Shmuel Ur, Avi Ziv
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