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114
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SAMOS
2004
Springer
15 years 9 months ago
with Wide Functional Units
— Architectural resources and program recurrences are the main limitations to the amount of Instruction-Level Parallelism (ILP) exploitable from loops, the most time-consuming pa...
Miquel Pericàs, Eduard Ayguadé, Javi...
121
Voted
DFT
2003
IEEE
64views VLSI» more  DFT 2003»
15 years 8 months ago
Hybrid BIST Time Minimization for Core-Based Systems with STUMPS Architecture
1 This paper presents a solution to the test time minimization problem for core-based systems that contain sequential cores with STUMPS architecture. We assume a hybrid BIST approa...
Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, ...
130
Voted
ICCAD
2003
IEEE
129views Hardware» more  ICCAD 2003»
15 years 8 months ago
Performance Optimization of Latency Insensitive Systems Through Buffer Queue Sizing of Communication Channels
This paper proposes for latency insensitive systems a performance optimization technique called channel buffer queue sizing, which is performed after relay station insertion in th...
Ruibing Lu, Cheng-Kok Koh
126
Voted
INFOCOM
2003
IEEE
15 years 8 months ago
Optimal Bandwidth Reservation Schedule in Cellular Network
Abstract— Efficient bandwidth allocation strategy with simultaneous fulfillment of QoS requirement of a user in a mobile cellular network is still a critical and an important p...
Samrat Ganguly, B. R. Badrinath, Navin Goyal
117
Voted
INFOVIS
2003
IEEE
15 years 8 months ago
A Visual Workspace for Hybrid Multidimensional Scaling Algorithms
In visualising multidimensional data, it is well known that different types of data require different types of algorithms to process them. Data sets might be distinguished accordi...
Greg Ross, Matthew Chalmers
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