6554 search results - page 1249 / 1311 » Constraint Logic Programming |
156
Voted
LCTRTS
2010
Springer
15 years 1 months ago
2010
Springer
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...
241
Voted
ICDE
2008
IEEE
16 years 4 months ago
2008
IEEE
We present a system towards the integration of data mining into relational databases. To this end, a relational database model is proposed, based on the so called virtual mining vi...
140
click to vote
DAC
2007
ACM
16 years 4 months ago
2007
ACM
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
101
Voted
DAC
2003
ACM
16 years 4 months ago
2003
ACM
Delay budget is an excess delay each component of a design can tolerate under a given timing constraint. Delay budgeting has been widely exploited to improve the design quality. W...
112
click to vote
HPCA
2009
IEEE
16 years 3 months ago
2009
IEEE
Several recent processor designs have proposed to enhance performance by increasing the clock frequency to the point where timing faults occur, and by adding error-correcting supp...