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ISLPED
2009
ACM
125views Hardware» more  ISLPED 2009»
15 years 11 months ago
Behavior-level observability don't-cares and application to low-power behavioral synthesis
Many techniques for power management employed in advanced RTL synthesis tools rely explicitly or implicitly on observability don’t-care (ODC) conditions. In this paper we presen...
Jason Cong, Bin Liu, Zhiru Zhang
FPGA
2007
ACM
119views FPGA» more  FPGA 2007»
15 years 11 months ago
Synthesis of an application-specific soft multiprocessor system
The application-specific multiprocessor System-on-a-Chip is a promising design alternative because of its high degree of flexibility, short development time, and potentially high ...
Jason Cong, Guoling Han, Wei Jiang
FPGA
2005
ACM
80views FPGA» more  FPGA 2005»
15 years 10 months ago
Simultaneous timing-driven placement and duplication
Logic duplication is an effective method for improving circuit performance. In this paper we present an algorithm named SPD that performs simultaneous placement and duplication to...
Gang Chen, Jason Cong
DATE
1999
IEEE
162views Hardware» more  DATE 1999»
15 years 9 months ago
MOCSYN: Multiobjective Core-Based Single-Chip System Synthesis
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
Robert P. Dick, Niraj K. Jha
DEXA
2010
Springer
182views Database» more  DEXA 2010»
15 years 5 months ago
Minimum Spanning Tree on Spatio-Temporal Networks
Given a spatio-temporal network (ST network) whose edge properties vary with time, a time-sub-interval minimum spanning tree (TSMST) is a collection of distinct minimum spanning t...
Viswanath Gunturi, Shashi Shekhar, Arnab Bhattacha...