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» Constraint Solving for Interpolation
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ASPDAC
2008
ACM
145views Hardware» more  ASPDAC 2008»
15 years 2 months ago
Mixed integer linear programming-based optimal topology synthesis of cascaded crossbar switches
- We present a topology synthesis method for high performance System-on-Chip (SoC) design. Our method provides an optimal topology of on-chip communication network for the given ba...
Minje Jun, Sungjoo Yoo, Eui-Young Chung
106
Voted
CIA
2008
Springer
15 years 2 months ago
Filter Allocation Using Iterative ECNP
Network devices can filter traffic in order to protect end-user computers against network worms and other threats. Since these devices have very limited memories and cannot deploy ...
Jan Tozicka, Stepán Urban, Magdalena Prokop...
ASPDAC
2005
ACM
146views Hardware» more  ASPDAC 2005»
15 years 2 months ago
High-level synthesis for DSP applications using heterogeneous functional units
Abstract— This paper addresses high level synthesis for realtime digital signal processing (DSP) architectures using heterogeneous functional units (FUs). For such special purpos...
Zili Shao, Qingfeng Zhuge, Chun Xue, Bin Xiao, Edw...
ASPDAC
2005
ACM
78views Hardware» more  ASPDAC 2005»
15 years 2 months ago
Timing driven track routing considering coupling capacitance
Abstract— As VLSI technology enters the ultra-deep submicron era, wire coupling capacitance starts to dominate self capacitance and can no longer be neglected in timing driven ro...
Di Wu, Jiang Hu, Min Zhao, Rabi N. Mahapatra
81
Voted
ASPDAC
2005
ACM
119views Hardware» more  ASPDAC 2005»
15 years 2 months ago
CMP aware shuttle mask floorplanning
- By putting different chips on the same mask, shuttle mask (or multiple project wafer) provides an economical solution for low volume designs and design prototypes to share the ri...
Gang Xu, Ruiqi Tian, David Z. Pan, Martin D. F. Wo...