In the previous work, the problem of nding gate delays to eliminate glitches has been solved by linear programs (LP) requiring an exponentially large number ofconstraints. By intr...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
This paper presents a pseudo-functional BIST scheme that attempts to minimize the over-testing problem of logic BIST for delay and crosstalk-induced failures. The over-testing pro...
—Any system which must learn to perform a large number of behavioral features with limited information handling resources will tend to be constrained within a set of architectura...
Scan-based architectures, though widely used in modern designs, are expensive in power consumption. In this paper, we present a new technique that allows to design power-optimized...
Abstract. This paper reconsiders the deployment of synchronous optical networks (SONET), an optimization problem naturally expressed in terms of set variables. Earlier approaches, ...