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» Constraints as a design pattern
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VLSID
2003
IEEE
103views VLSI» more  VLSID 2003»
16 years 28 days ago
Minimum Dynamic Power CMOS Circuit Design by a Reduced Constraint Set Linear Program
In the previous work, the problem of nding gate delays to eliminate glitches has been solved by linear programs (LP) requiring an exponentially large number ofconstraints. By intr...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
95
Voted
VTS
2005
IEEE
96views Hardware» more  VTS 2005»
15 years 6 months ago
Pseudo-Functional Scan-based BIST for Delay Fault
This paper presents a pseudo-functional BIST scheme that attempts to minimize the over-testing problem of logic BIST for delay and crosstalk-induced failures. The over-testing pro...
Yung-Chieh Lin, Feng Lu, Kwang-Ting Cheng
88
Voted
IJCNN
2006
IEEE
15 years 6 months ago
Constraints on the Design Process for Systems with Human Level Intelligence
—Any system which must learn to perform a large number of behavioral features with limited information handling resources will tend to be constrained within a set of architectura...
L. Andrew Coward
108
Voted
ITC
2003
IEEE
138views Hardware» more  ITC 2003»
15 years 5 months ago
Efficient Scan Chain Design for Power Minimization During Scan Testing Under Routing Constraint
Scan-based architectures, though widely used in modern designs, are expensive in power consumption. In this paper, we present a new technique that allows to design power-optimized...
Yannick Bonhomme, Patrick Girard, Loïs Guille...
131
Voted
CPAIOR
2010
Springer
14 years 11 months ago
Boosting Set Constraint Propagation for Network Design
Abstract. This paper reconsiders the deployment of synchronous optical networks (SONET), an optimization problem naturally expressed in terms of set variables. Earlier approaches, ...
Justin Yip, Pascal Van Hentenryck, Carmen Gervet