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» Constraints in Weighted Averaging
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FPGA
2001
ACM
145views FPGA» more  FPGA 2001»
15 years 5 months ago
Simultaneous logic decomposition with technology mapping in FPGA designs
Conventional technology mapping algorithms for SRAM-based Field Programmable Gate Arrays (FPGAs) are normally carried out on a fixed logic decomposition of a circuit. The impact o...
Gang Chen, Jason Cong
ASPDAC
2008
ACM
115views Hardware» more  ASPDAC 2008»
15 years 2 months ago
An optimal algorithm for sizing sequential circuits for industrial library based designs
In this paper, we propose an optimal gate sizing and clock skew optimization algorithm for globally sizing synchronous sequential circuits. The number of constraints and variables ...
Sanghamitra Roy, Yu Hen Hu, Charlie Chung-Ping Che...
ASPDAC
2008
ACM
94views Hardware» more  ASPDAC 2008»
15 years 2 months ago
Robust on-chip bus architecture synthesis for MPSoCs under random tasks arrival
A major trend in a modern system-on-chip design is a growing system complexity, which results in a sharp increase of communication traffic on the on-chip communication bus architec...
Sujan Pandey, Rolf Drechsler
DCOSS
2008
Springer
15 years 2 months ago
An Information Theoretic Framework for Field Monitoring Using Autonomously Mobile Sensors
We consider a mobile sensor network monitoring a spatio-temporal field. Given limited caches at the sensor nodes, the goal is to develop a distributed cache management algorithm to...
Hany Morcos, George Atia, Azer Bestavros, Ibrahim ...
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CORR
2007
Springer
120views Education» more  CORR 2007»
15 years 22 days ago
On the Feedback Capacity of Power Constrained Gaussian Noise Channels with Memory
—For a stationary additive Gaussian-noise channel with a rational noise power spectrum of a finite-order L, we derive two new results for the feedback capacity under an average ...
Shaohua Yang, Aleksandar Kavcic, Sekhar Tatikonda