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IPPS
2002
IEEE
15 years 9 months ago
Efficient Pipelining of Nested Loops: Unroll-and-Squash
The size and complexity of current custom VLSI have forced the use of high-level programming languages to describe hardware, and compiler and synthesis technology bstract designs ...
Darin Petkov, Randolph E. Harr, Saman P. Amarasing...
ISCA
2002
IEEE
103views Hardware» more  ISCA 2002»
15 years 9 months ago
Efficient Dynamic Scheduling Through Tag Elimination
An increasingly large portion of scheduler latency is derived from the monolithic content addressable memory (CAM) arrays accessed during instruction wakeup. The performance of th...
Dan Ernst, Todd M. Austin
ISPAN
2002
IEEE
15 years 9 months ago
Automatic Processor Lower Bound Formulas for Array Computations
In the directed acyclic graph (dag) model of algorithms, consider the following problem for precedence-constrained multiprocessor schedules for array computations: Given a sequenc...
Peter R. Cappello, Ömer Egecioglu
ISSRE
2002
IEEE
15 years 9 months ago
Inter-Class Mutation Operators for Java
The effectiveness of mutation testing depends heavily on the types of faults that the mutation operators are designed to represent. Therefore, the quality of the mutation operator...
Yu-Seung Ma, Yong Rae Kwon, Jeff Offutt
SIGSOFT
2009
ACM
15 years 8 months ago
Srijan: a graphical toolkit for sensor network macroprogramming
Macroprogramming is an application development technique for wireless sensor networks (WSNs) where the developer specifies the behavior of the system, as opposed to that of the c...
Animesh Pathak, Mahanth K. Gowda