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FCCM
1998
IEEE
148views VLSI» more  FCCM 1998»
15 years 8 months ago
JHDL - An HDL for Reconfigurable Systems
JHDL is a design tool for reconfigurable systems that allows designers to express circuit organizations that dynamically change over time in a natural way, using only standard pro...
Peter Bellows, Brad L. Hutchings
ARTS
1997
Springer
15 years 7 months ago
The Verus Language: Representing Time Efficiently with BDDs
There have been significant advances on formal methods to verify complex systems recently. Nevertheless, these methods have not yet been accepted as a realistic alternative to the ...
Sérgio Vale Aguiar Campos, Edmund M. Clarke
ICSE
1987
IEEE-ACM
15 years 7 months ago
Software Interconnection Models
We present a formulation of interconnection models and present the unit and syntactic models -- the primary models used for managing the evolution of large software systems. We di...
Dewayne E. Perry
AIPS
2007
15 years 6 months ago
Bounding the Resource Availability of Activities with Linear Resource Impact
We introduce the Linear Resource Temporal Network (LRTN), which consists of activities that consume or produce a resource, subject to absolute and relative metric temporal constra...
Jeremy Frank, Paul H. Morris
SAC
2006
ACM
15 years 3 months ago
A new method of generating synchronizable test sequences that detect output-shifting faults based on multiple UIO sequences
The objective of testing is to determine the conformance between a system and its specification. When testing distributed systems, the existence of multiple testers brings out the...
Kai Chen, Fan Jiang, Chuan-dong Huang