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TIME
1994
IEEE
15 years 4 months ago
Belief Revision in a Discrete Temporal Probability-Logic
We describe a discrete time probabilitylogic for use as the representation language of a temporal knowledge base. In addition to the usual expressive power of a discrete temporal ...
Scott D. Goodwin, Howard J. Hamilton, Eric Neufeld...
AIIA
2005
Springer
15 years 6 months ago
Handling Continuous-Valued Attributes in Incremental First-Order Rules Learning
Machine Learning systems are often distinguished according to the kind of representation they use, which can be either propositional or first-order logic. The framework working wi...
Teresa Maria Altomare Basile, Floriana Esposito, N...
DAC
2005
ACM
15 years 2 months ago
Multiplexer restructuring for FPGA implementation cost reduction
This paper presents a novel synthesis algorithm that reduces the area needed for implementing multiplexers on an FPGA by an average of 18%. This is achieved by reducing the number...
Paul Metzgen, Dominic Nancekievill
113
Voted
DAC
2010
ACM
14 years 7 months ago
Node addition and removal in the presence of don't cares
This paper presents a logic restructuring technique named node addition and removal (NAR). It works by adding a node into a circuit to replace an existing node and then removing t...
Yung-Chih Chen, Chun-Yao Wang
100
Voted
VLSID
2007
IEEE
153views VLSI» more  VLSID 2007»
16 years 29 days ago
Extracting Logic Circuit Structure from Conjunctive Normal Form Descriptions
Boolean Satisfiability is seeing increasing use as a decision procedure in Electronic Design Automation (EDA) and other domains. Most applications encode their domain specific cons...
Zhaohui Fu, Sharad Malik