249 search results - page 12 / 50 » Context Sensitivity in Logical Modeling with Time Delays |
CHES
2006
Springer
15 years 3 months ago
2006
Springer
This paper presents a Path Swapping (PS) method which enables to enhance the security of Quasi Delay Insensitive Asynchronous Circuits against Power Analysis (PA) attack. This appr...
DAC
2005
ACM
15 years 1 months ago
2005
ACM
A physical yet compact gate delay model is developed integrating short-channel effects and the Alpha-power law based timing model. This analytical approach accurately predicts bot...
113
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NIPS
2004
15 years 1 months ago
2004
We use unsupervised probabilistic machine learning ideas to try to explain the kinds of learning observed in real neurons, the goal being to connect abstract principles of self-or...
ITC
2003
IEEE
15 years 5 months ago
2003
IEEE
In this paper, we study the possibility of using logic defect-level prediction models to predict the detection behavior of statistical timing defects. We compare two known logic m...
106
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PLDI
2009
ACM
15 years 4 months ago
2009
ACM
Dynamic information flow policies, such as declassification, are essential for practically useful information flow control systems. However, most systems proposed to date that ...