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» Context Sensitivity in Logical Modeling with Time Delays
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EDCC
1999
Springer
15 years 4 months ago
Dependability Modelling and Sensitivity Analysis of Scheduled Maintenance Systems
Abstract. In this paper we present a new modelling approach for dependability evaluation and sensitivity analysis of Scheduled Maintenance Systems, based on a Deterministic and Sto...
Andrea Bondavalli, Ivan Mura, Kishor S. Trivedi
INFOCOM
2010
IEEE
14 years 10 months ago
Non-Preemptive Buffer Management for Latency Sensitive Packets
—The delivery of latency sensitive packets is a crucial issue in real time applications of communication networks. Such packets often have a firm deadline and a packet becomes u...
Moran Feldman, Joseph Naor
DAC
2002
ACM
16 years 22 days ago
Petri net modeling of gate and interconnect delays for power estimation
In this paper, a new type of Petri net called Hierarchical Colored Hardware Petri net, to model real-delay switching activity for power estimation is proposed. The logic circuit i...
Ashok K. Murugavel, N. Ranganathan
DATE
2000
IEEE
136views Hardware» more  DATE 2000»
15 years 4 months ago
On Applying Incremental Satisfiability to Delay Fault Testing
The Boolean satisfiability problem (SAT) has various applications in electronic design automation (EDA) fields such as testing, timing analysis and logic verification. SAT has bee...
Joonyoung Kim, Jesse Whittemore, Karem A. Sakallah...
GC
2004
Springer
15 years 5 months ago
The KGP Model of Agency for Global Computing: Computational Model and Prototype Implementation
Abstract. We present the computational counterpart of the KGP (Knowledge, Goals, Plan) declarative model of agency for Global Computing. In this context, a computational entity is ...
Andrea Bracciali, Neophytos Demetriou, Ulrich Endr...