Sciweavers

249 search results - page 15 / 50
» Context Sensitivity in Logical Modeling with Time Delays
Sort
View
FPGA
1998
ACM
148views FPGA» more  FPGA 1998»
15 years 4 months ago
Configuration Prefetch for Single Context Reconfigurable Coprocessors
Current reconfigurable systems suffer from a significant overhead due to the time it takes to reconfigure their hardware. In order to deal with this overhead, and increase the com...
Scott Hauck
IADIS
2004
15 years 1 months ago
A Middleware Service for Managing Time and Quality Dependent Context
Nowadays, wearable devices, such as mobile phones, PDAs, etc. gain widespread popularity for communication and data exchange. Consequently, several approaches investigate the prob...
Tasos Kontogiorgis, Dimitrios I. Fotiadis, Apostol...
ISMVL
2007
IEEE
92views Hardware» more  ISMVL 2007»
15 years 6 months ago
Experimental Studies on SAT-Based ATPG for Gate Delay Faults
The clock rate of modern chips is still increasing and at the same time the gate size decreases. As a result, already slight variations during the production process may cause a f...
Stephan Eggersglüß, Daniel Tille, G&oum...
166
Voted
DSS
2011
14 years 3 months ago
Estimating the effect of word of mouth on churn and cross-buying in the mobile phone market with Markov logic networks
Abstract: Much has been written about word of mouth and customer behavior. Telephone call detail records provide a novel way to understand the strength of the relationship between ...
Torsten Dierkes, Martin Bichler, Ramayya Krishnan
JMLR
2010
134views more  JMLR 2010»
14 years 6 months ago
Using Contextual Representations to Efficiently Learn Context-Free Languages
We present a polynomial update time algorithm for the inductive inference of a large class of context-free languages using the paradigm of positive data and a membership oracle. W...
Alexander Clark, Rémi Eyraud, Amaury Habrar...