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» Context Sensitivity in Logical Modeling with Time Delays
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ATS
2003
IEEE
75views Hardware» more  ATS 2003»
15 years 5 months ago
An Enhanced Test Generator for Capacitance Induced Crosstalk Delay Faults
Capacitive crosstalk can give rise to slowdown of signals that can propagate to a circuit output and create a functional error. A test generation methodology, called XGEN, was dev...
Arani Sinha, Sandeep K. Gupta, Melvin A. Breuer
CADE
2005
Springer
16 years 2 days ago
Well-Nested Context Unification
Abstract. Context unification (CU) is the open problem of solving context equations for trees. We distinguish a new decidable variant of CU? well-nested CU ? and present a new unif...
Jordi Levy, Joachim Niehren, Mateu Villaret
ICCAD
2006
IEEE
169views Hardware» more  ICCAD 2006»
15 years 8 months ago
Microarchitecture parameter selection to optimize system performance under process variation
Abstract— Design variability due to within-die and die-todie process variations has the potential to significantly reduce the maximum operating frequency and the effective yield...
Xiaoyao Liang, David Brooks
DATE
2002
IEEE
154views Hardware» more  DATE 2002»
15 years 4 months ago
Low Power Error Resilient Encoding for On-Chip Data Buses
As technology scales toward deep submicron, on-chip interconnects are becoming more and more sensitive to noise sources such as power supply noise, crosstalk, radiation induced ef...
Davide Bertozzi, Luca Benini, Giovanni De Micheli
ASIAN
2007
Springer
157views Algorithms» more  ASIAN 2007»
15 years 6 months ago
A Logical Framework for Evaluating Network Resilience Against Faults and Attacks
Abstract. We present a logic-based framework to evaluate the resilience of computer networks in the face of incidents, i.e., attacks from malicious intruders as well as random faul...
Elie Bursztein, Jean Goubault-Larrecq