249 search results - page 30 / 50 » Context Sensitivity in Logical Modeling with Time Delays |
100
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CONCUR
2007
Springer
15 years 8 months ago
2007
Springer
Abstract. We propose a new model for timed games, based on concurrent game structures (CGSs). Compared to the classical timed game automata of Asarin et al. [8], our timed CGSs are...
109
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DATE
2006
IEEE
15 years 8 months ago
2006
IEEE
This paper proposes a yield optimization method for standard-cells under timing constraints. Yield-aware logic synthesis and physical optimization require yield-enhanced standard ...
126
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ILP
2005
Springer
15 years 7 months ago
2005
Springer
Recursive loops in a logic program present a challenging problem to the PLP framework. On the one hand, they loop forever so that the PLP backward-chaining inferences would never s...
108
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DATE
2010
IEEE
15 years 7 months ago
2010
IEEE
—Variations of process parameters have an important impact on reliability and yield in deep sub micron IC technologies. One methodology to estimate the influence of these effects...
GLVLSI
2006
IEEE
15 years 8 months ago
2006
IEEE
Process variations have become a key concern of circuit designers because of their significant, yet hard to predict impact on performance and signal integrity of VLSI circuits. St...