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» Context Sensitivity in Logical Modeling with Time Delays
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TASLP
2010
99views more  TASLP 2010»
15 years 8 days ago
A Virtual Model of Spring Reverberation
—The digital emulation of analog audio effects and synthesis components, through the simulation of lumped circuit components has seen a large amount of activity in recent years; ...
Stefan Bilbao, Julian Parker
ENTCS
2006
138views more  ENTCS 2006»
15 years 1 months ago
Variables as Resource in Separation Logic
Separation logic [20,21,14] began life as an extended formalisation of Burstall's treatment of list-mutating programs [8]. It rapidly became clear that there was more that it...
Richard Bornat, Cristiano Calcagno, Hongseok Yang
NETWORKING
2004
15 years 3 months ago
Modeling the Short-Term Unfairness of IEEE 802.11 in Presence of Hidden Terminals
: IEEE 802.11 exhibits both short-term and long-term unfairness [15]. The short-term fairness automatically gives rise to long-term fairness, but not vice versa [11]. When we thoro...
Zhifei Li, Sukumar Nandi, Anil K. Gupta
DSN
2002
IEEE
15 years 6 months ago
Model Checking Performability Properties
Model checking has been introduced as an automated technique to verify whether functional properties, expressed in a formal logic like computational tree logic (CTL), do hold in a...
Boudewijn R. Haverkort, Lucia Cloth, Holger Herman...
AB
2008
Springer
15 years 8 months ago
Local Structure and Behavior of Boolean Bioregulatory Networks
Abstract. A well-known discrete approach to modeling biological regulatory networks is the logical framework developed by R. Thomas. The network structure is captured in an interac...
Heike Siebert