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» Context Sensitivity in Logical Modeling with Time Delays
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UIALL
2004
Springer
15 years 2 months ago
A Framework for Context-Sensitive Coordination of Human Interruptions in Human-Computer Interaction
Abstract. Recent trends in software development directed toward intelligence, distribution, and mobility need to be followed by an increased sophistication in user interface design...
Sonja Gievska, John L. Sibert
ICCAD
2005
IEEE
133views Hardware» more  ICCAD 2005»
15 years 6 months ago
Gate sizing using incremental parameterized statistical timing analysis
— As technology scales into the sub-90nm domain, manufacturing variations become an increasingly significant portion of circuit delay. As a result, delays must be modeled as sta...
Matthew R. Guthaus, Natesan Venkateswaran, Chandu ...
VLSID
2002
IEEE
94views VLSI» more  VLSID 2002»
15 years 10 months ago
Timing Yield Calculation Using an Impulse-Train Approach
This paper presents a new method to compute the probability distribution of the delay of a combinational circuit and uses it obtain an estimate of the yield of the process that ma...
Srinath R. Naidu
ICASSP
2007
IEEE
15 years 3 months ago
Fast Search of Sequences with Complex Symbol Correlations using Profile Context-Sensitive HMMS and Pre-Screening Filters
Recently, profile context-sensitive HMMs (profile-csHMMs) have been proposed which are very effective in modeling the common patterns and motifs in related symbol sequences. Pro...
Byung-Jun Yoon, P. P. Vaidyanathan
DAC
2006
ACM
15 years 10 months ago
Statistical logic cell delay analysis using a current-based model
A statistical model for the purpose of logic cell timing analysis in the presence of process variations is presented. A new current-based cell delay model is utilized, which can a...
Hanif Fatemi, Shahin Nazarian, Massoud Pedram