Sciweavers

677 search results - page 89 / 136
» Context-Aware Performance Analysis for Efficient Embedded Sy...
Sort
View
CASES
2006
ACM
15 years 7 months ago
High-level power analysis for multi-core chips
Technology trends have led to the advent of multi-core chips in the form of both general-purpose chip multiprocessors (CMPs) and embedded multi-processor systems-on-a-chip (MPSoCs...
Noel Eisley, Vassos Soteriou, Li-Shiuan Peh
CODES
2005
IEEE
15 years 3 months ago
Implementation of dynamic streaming Applications on heterogeneous multi-Processor architectures
System design based on static task graphs does not match well with modern consumer electronic devices with dynamic stream processing applications. We propose the TTL API for task ...
Tomas Henriksson, Jeffrey Kang, Pieter van der Wol...
IPPS
2005
IEEE
15 years 7 months ago
Accelerating Scientific Applications with the SRC-6 Reconfigurable Computer: Methodologies and Analysis
Reconfigurable computing offers the promise of performing computations in hardware to increase performance and efficiency while retaining much of the flexibility of a software sol...
Melissa C. Smith, Jeffrey S. Vetter, Xuejun Liang
DATE
2004
IEEE
152views Hardware» more  DATE 2004»
15 years 5 months ago
A Design Methodology for the Exploitation of High Level Communication Synthesis
In this paper we analyse some methodological concerns that have to be faced in a design flow which contains automatic synthesis phases from high-level, system descriptions. In par...
Francesco Bruschi, Massimo Bombana
WCRE
2002
IEEE
15 years 6 months ago
Estimating Potential Parallelism for Platform Retargeting
Scientific, symbolic, and multimedia applications present diverse computing workloads with different types of inherent parallelism. Tomorrow’s processors will employ varying com...
Linda M. Wills, Tarek M. Taha, Lewis B. Baumstark ...