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ISVLSI
2008
IEEE
156views VLSI» more  ISVLSI 2008»
16 years 1 months ago
Characterisation of FPGA Clock Variability
As integrated circuits are scaled down it becomes difficult to maintain uniformity in process parameters across each individual die. The resulting performance variation requires ...
N. Pete Sedcole, Justin S. Wong, Peter Y. K. Cheun...
PRDC
2008
IEEE
16 years 1 months ago
On the Complexity of a Self-Stabilizing Spanning Tree Algorithm for Large Scale Systems
Many large scale systems, like grids and structured peer to peer systems, operate on a constrained topology. Since underlying networks do not expose the real topology to the appli...
Julien Clement, Thomas Hérault, Stép...
DATE
2007
IEEE
126views Hardware» more  DATE 2007»
16 years 1 months ago
WAVSTAN: waveform based variational static timing analysis
— We present a waveform based variational static timing analysis methodology. It is a timing paradigm that lies midway between convention static delay approximations and full dyn...
Saurabh K. Tiwary, Joel R. Phillips
ICC
2007
IEEE
114views Communications» more  ICC 2007»
16 years 1 months ago
An FPGA Implementation of Dirty Paper Precoder
—Dirty paper code (DPC) can be used in a number of communication network applications; broadcast channels, multiuser interference channels and ISI channels to name a few. We stud...
Pankaj Bhagawat, Weihuang Wang, Momin Uppal, Gwan ...
IJCNN
2007
IEEE
16 years 1 months ago
A Constructive-Fuzzy System Modeling for Time Series Forecasting
— This paper suggests a constructive fuzzy system modeling for time series prediction. The model proposed is based on Takagi-Sugeno system and it comprises two phases. First, a f...
Ivette Luna, Secundino Soares, Rosangela Ballini
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