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ISQED
2006
IEEE
147views Hardware» more  ISQED 2006»
15 years 3 months ago
Compact Reduced Order Modeling for Multiple-Port Interconnects
— In this paper, we propose an efficient model order reduction (MOR) algorithm, called MTermMOR, for modeling interconnect circuits with large number of external ports. The prop...
Pu Liu, Sheldon X.-D. Tan, Bruce McGaughy, Lifeng ...
MICRO
2006
IEEE
127views Hardware» more  MICRO 2006»
15 years 3 months ago
A Predictive Performance Model for Superscalar Processors
Designing and optimizing high performance microprocessors is an increasingly difficult task due to the size and complexity of the processor design space, high cost of detailed si...
P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthav...
ACG
2006
Springer
15 years 3 months ago
A New Family of k-in-a-Row Games
First, this paper introduces a new family of k-in-a-row games, Connect(m, n, k, p, q). In Connect(m, n, k, p, q), two players alternately place p stones on an m × n board in each ...
I-Chen Wu, Dei-Yen Huang
CASES
2006
ACM
15 years 3 months ago
Adapting compilation techniques to enhance the packing of instructions into registers
The architectural design of embedded systems is becoming increasingly idiosyncratic to meet varying constraints regarding energy consumption, code size, and execution time. Tradit...
Stephen Hines, David B. Whalley, Gary S. Tyson
CASES
2006
ACM
15 years 3 months ago
Adaptive object code compression
Previous object code compression schemes have employed static and semiadaptive compression algorithms to reduce the size of instruction memory in embedded systems. The suggestion ...
John Gilbert, David M. Abrahamson
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