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HPCA
2003
IEEE
16 years 3 months ago
A Methodology for Designing Efficient On-Chip Interconnects on Well-Behaved Communication Patterns
As the level of chip integration continues to advance at a fast pace, the desire for efficient interconnects-whether on-chip or off-chip--is rapidly increasing. Traditional interc...
Wai Hong Ho, Timothy Mark Pinkston
ICCAD
2002
IEEE
106views Hardware» more  ICCAD 2002»
16 years 7 days ago
Throughput-driven IC communication fabric synthesis
As the scale of system integration continues to grow, the on-chip communication becomes the ultimate bottleneck of system performance and the primary determinant of system archite...
Tao Lin, Lawrence T. Pileggi
ISPD
2009
ACM
126views Hardware» more  ISPD 2009»
15 years 10 months ago
A new algorithm for simultaneous gate sizing and threshold voltage assignment
Gate sizing and threshold voltage (Vt) assignment are popular techniques for circuit timing and power optimization. Existing methods, by and large, are either sensitivity-driven h...
Yifang Liu, Jiang Hu
103
Voted
DATE
2009
IEEE
101views Hardware» more  DATE 2009»
15 years 10 months ago
Static analysis to mitigate soft errors in register files
—With continuous technology scaling, soft errors are becoming an increasingly important design concern even for earth-bound applications. While compiler approaches have the poten...
Jongeun Lee, Aviral Shrivastava
ICECCS
2009
IEEE
119views Hardware» more  ICECCS 2009»
15 years 10 months ago
REMES: A Resource Model for Embedded Systems
In this paper, we introduce the model REMES for formal modeling and analysis of embedded resources such as storage, energy, communication, and computation. The model is a state-ma...
Cristina Cerschi Seceleanu, Aneta Vulgarakis, Paul...