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CODES
2007
IEEE
15 years 4 months ago
Secure FPGA circuits using controlled placement and routing
In current Field-Programmable-Logic Architecture (FPGA) design flows, it is very hard to control the routing of submodules. It is thus very hard to make an identical copy of an ex...
Pengyuan Yu, Patrick Schaumont
ASPDAC
1998
ACM
72views Hardware» more  ASPDAC 1998»
15 years 1 months ago
Space- and Time-Efficient BDD Construction via Working Set Control
Binary decision diagrams (BDDs) have been shown to be a powerful tool in formal verification. Efficient BDD construction techniques become more important as the complexity of proto...
Bwolen Yang, Yirng-An Chen, Randal E. Bryant, Davi...
MICRO
2006
IEEE
191views Hardware» more  MICRO 2006»
14 years 9 months ago
CAPSULE: Hardware-Assisted Parallel Execution of Component-Based Programs
Since processor performance scalability will now mostly be achieved through thread-level parallelism, there is a strong incentive to parallelize a broad range of applications, inc...
Pierre Palatin, Yves Lhuillier, Olivier Temam
OTM
2009
Springer
15 years 4 months ago
TMBean: Optimistic Concurrency in Application Servers Using Transactional Memory
Abstract. In this experience report, we present an evaluation of different techniques to manage concurrency in the context of application servers. Traditionally, using entity beans...
Lucas Charles, Pascal Felber, Christophe Gêt...
ICSE
2010
IEEE-ACM
15 years 2 months ago
Adaptive bug isolation
Statistical debugging uses lightweight instrumentation and statistical models to identify program behaviors that are strongly predictive of failure. However, most software is most...
Piramanayagam Arumuga Nainar, Ben Liblit