Sciweavers

360 search results - page 30 / 72
» Control network generator for latency insensitive designs
Sort
View
ICCD
2002
IEEE
115views Hardware» more  ICCD 2002»
15 years 6 months ago
Low-Power, High-Speed CMOS VLSI Design
Ubiquitous computing is a next generation information technology where computers and communications will be scaled further, merged together, and materialized in consumer applicati...
Tadahiro Kuroda
VLSID
2004
IEEE
292views VLSI» more  VLSID 2004»
15 years 10 months ago
NoCGEN: A Template Based Reuse Methodology for Networks on Chip Architecture
In this paper, we describe NoCGEN, a Network On Chip (NoC) generator, which is used to create a simulatable and synthesizable NoC description. NoCGEN uses a set of modularised rou...
Jeremy Chan, Sri Parameswaran
ICC
2009
IEEE
178views Communications» more  ICC 2009»
14 years 7 months ago
Cross-Layer Design for Energy Conservation in Wireless Sensor Networks
Abstract-- Wireless sensor networks (WSNs) require energyef cient protocols to improve the network lifetime. In this work, we adopt a cross-layer strategy that considers routing an...
Fatma Bouabdallah, Nizar Bouabdallah, Raouf Boutab...
AROBOTS
1999
107views more  AROBOTS 1999»
14 years 9 months ago
Walking Robots and the Central and Peripheral Control of Locomotion in Insects
This paper outlines aspects of locomotor control in insects that may serve as the basis for the design of controllers for autonomous hexapod robots. Control of insect walking can b...
Fred Delcomyn
ENTCS
2008
83views more  ENTCS 2008»
14 years 9 months ago
Elastic Flow in an Application Specific Network-on-Chip
A Network-on-Chip (NoC) is increasingly needed to interconnect the large number and variety of Intellectual Property (IP) cells that make up a System-on-Chip (SoC). The network mu...
Daniel Gebhardt, Kenneth S. Stevens