Sciweavers

5339 search results - page 804 / 1068
» Controllable Delay-Insensitive Processes
Sort
View
DAC
2007
ACM
16 years 7 months ago
Trusted Hardware: Can It Be Trustworthy?
Processing and storage of confidential or critical information is an every day occurrence in computing systems. The trustworthiness of computing devices has become an important co...
Cynthia E. Irvine, Karl N. Levitt
VLSID
2007
IEEE
210views VLSI» more  VLSID 2007»
16 years 6 months ago
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
Phillip H. Jones, Young H. Cho, John W. Lockwood
ICSE
2007
IEEE-ACM
16 years 6 months ago
Analysis of a Redundant Architecture for Critical Infrastructure Protection
Critical infrastructures like the power grid are emerging as collection of existing separated systems of different nature which are interconnected together. Their criticality becom...
Alessandro Daidone, Andrea Bondavalli, Paulo Ver&i...
SOSP
2003
ACM
16 years 3 months ago
Capriccio: scalable threads for internet services
This paper presents Capriccio, a scalable thread package for use with high-concurrency servers. While recent work has advocated event-based systems, we believe that threadbased sy...
J. Robert von Behren, Jeremy Condit, Feng Zhou, Ge...
RTSS
2009
IEEE
16 years 27 days ago
Coordinated Task Scheduling, Allocation and Synchronization on Multiprocessors
—Chip-multiprocessors represent a dominant new shift in the field of processor design. Better utilization of such technology in the real-time context requires coordinated approa...
Karthik Lakshmanan, Dionisio de Niz, Ragunathan Ra...