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» Controller Architecture for Safe Cognitive Technical Systems
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CASES
2009
ACM
15 years 4 months ago
CheckerCore: enhancing an FPGA soft core to capture worst-case execution times
Embedded processors have become increasingly complex, resulting in variable execution behavior and reduced timing predictability. On such processors, safe timing specifications e...
Jin Ouyang, Raghuveer Raghavendra, Sibin Mohan, Ta...
WCRE
2009
IEEE
15 years 4 months ago
NTrace: Function Boundary Tracing for Windows on IA-32
—For a long time, dynamic tracing has been an enabling technique for reverse engineering tools. Tracing can not only be used to record the control flow of a particular component...
Johannes Passing, Alexander Schmidt, Martin von L&...
SACMAT
2011
ACM
14 years 10 days ago
An integrated approach for identity and access management in a SOA context
In this paper, we present an approach for identity and access management (IAM) in the context of (cross-organizational) serviceoriented architectures (SOA). In particular, we de...
Waldemar Hummer, Patrick Gaubatz, Mark Strembeck, ...
99
Voted
AIIDE
2008
14 years 12 months ago
Automatically Generating Summary Visualizations from Game Logs
In this paper we describe a system called ViGLS (Visualization of Game Log Summaries) that generates summaries of gameplay sessions from game logs. ViGLS automatically produces vi...
Yun-Gyung Cheong, Arnav Jhala, Byung-Chull Bae, R....
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
15 years 3 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil