74 search results - page 8 / 15 » Controlling Peak Power During Scan Testing |
DFT
2004
IEEE
15 years 1 months ago
2004
IEEE
This paper presents a novel delay fault testing technique, which can be used as an alternative to the enhanced scan based delay fault testing, with significantly less design overh...
ICCAD
2008
IEEE
15 years 6 months ago
2008
IEEE
—Increasing power densities due to process scaling, combined with high switching activity and poor cooling environments during testing, have the potential to result in high integ...
IOLTS
2008
IEEE
15 years 3 months ago
2008
IEEE
— Error correcting coding is the dominant technique to achieve acceptable soft-error rates in memory arrays. In many modern circuits, the number of memory elements in the random ...
ICAC
2007
IEEE
15 years 3 months ago
2007
IEEE
We present a technique that controls the peak power consumption of a high-density server by implementing a feedback controller that uses precise, system-level power measurement to ...
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Voted
ATS
2010
IEEE
14 years 6 months ago
2010
IEEE
Systems with many integrated circuits (ICs), often of the same type, are increasingly common to meet the constant performance demand. However, systems in recent semiconductor techn...