160 search results - page 7 / 32 » Cooperative Caching for Chip Multiprocessors |
146
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DSN
2011
IEEE
14 years 1 months ago
2011
IEEE
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
115
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JSA
2008
15 years 1 months ago
2008
Conventional snoopy-based chip multiprocessors take an aggressive approach broadcasting snoop requests to all nodes. In addition each node checks all received requests. This appro...
113
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ASPLOS
2008
ACM
15 years 3 months ago
2008
ACM
Integrating more processor cores on-die has become the unanimous trend in the microprocessor industry. Most of the current research thrusts using chip multiprocessors (CMPs) as th...
94
Voted
DATE
2009
IEEE
15 years 8 months ago
2009
IEEE
Abstract—Chip multiprocessors (CMPs) present a unique scenario for software data prefetching with subtle tradeoffs between memory bandwidth and performance. In a shared L2 based ...
93
Voted
ESA
2010
Springer
15 years 2 months ago
2010
Springer