131 search results - page 12 / 27 » Copy Elimination for Parallelizing Compilers |
MICRO
2000
IEEE
15 years 2 months ago
2000
IEEE
Value prediction breaks data dependencies in a program thereby creating instruction level parallelism that can increase program performance. Hardware based value prediction techni...
CODES
2004
IEEE
15 years 1 months ago
2004
IEEE
Register bypassing is a powerful and widely used feature in modern processors to eliminate certain data hazards. Although complete bypassing is ideal for performance, bypassing ha...
MICRO
1994
IEEE
15 years 1 months ago
1994
IEEE
Branch instructions are recognized as a major impediment to exploiting instruction level parallelism. Even with sophisticated branch prediction techniques, many frequently execute...
NGC
2007
Springer
14 years 9 months ago
2007
Springer
Abstract As more and more life science researchers start to take advantages of grid technologies in their work, the demand increases for a robust yet easy to use metascheduler or r...
PPOPP
1990
ACM
15 years 1 months ago
1990
ACM
Abstract - A multiprocessor system capable of exploiting fine-grained parallelism must support efficient synchronization and data passing mechanisms. This paper demonstrates the us...