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» Copy Elimination for Parallelizing Compilers
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2007
Tsinghua U.
15 years 3 months ago
Sensitivity analysis for automatic parallelization on multi-cores
Sensitivity Analysis (SA) is a novel compiler technique that complements, and integrates with, static automatic parallelization analysis for the cases when relevant program behavi...
Silvius Rus, Maikel Pennings, Lawrence Rauchwerger
CGO
2005
IEEE
15 years 3 months ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...
IEEEPACT
2008
IEEE
15 years 4 months ago
Redundancy elimination revisited
This work proposes and evaluates improvements to previously known algorithms for redundancy elimination. Enhanced Scalar Replacement combines two classic techniques, scalar replac...
Keith D. Cooper, Jason Eckhardt, Ken Kennedy
77
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EUROPAR
2003
Springer
15 years 2 months ago
Partial Redundancy Elimination with Predication Techniques
Partial redundancy elimination (PRE) techniques play an important role in optimizing compilers. Many optimizations, such as elimination of redundant expressions, communication opti...
Bernhard Scholz, Eduard Mehofer, R. Nigel Horspool
HPCA
2009
IEEE
15 years 10 months ago
Eliminating microarchitectural dependency from Architectural Vulnerability
The Architectural Vulnerability Factor (AVF) of a hardware structure is the probability that a fault in the structure will affect the output of a program. AVF captures both microa...
Vilas Sridharan, David R. Kaeli