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78
Voted
DAC
2002
ACM
15 years 11 months ago
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
Edson L. Horta, John W. Lockwood, David E. Taylor,...
DAC
2002
ACM
15 years 11 months ago
A universal technique for fast and flexible instruction-set architecture simulation
In the last decade, instruction-set simulators have become an essential development tool for the design of new programmable architectures. Consequently, the simulator performance ...
Achim Nohl, Gunnar Braun, Oliver Schliebusch, Rain...
DAC
2003
ACM
15 years 11 months ago
Automated synthesis of efficient binary decoders for retargetable software toolkits
A binary decoder is a common component of software development tools such as instruction set simulators, disassemblers and debuggers. The efficiency of the decoder can have a sign...
Wei Qin, Sharad Malik
77
Voted
DAC
2005
ACM
15 years 11 months ago
MP core: algorithm and design techniques for efficient channel estimation in wireless applications
Channel estimation and multiuser detection are enabling technologies for future generations of wireless applications. However, sophisticated algorithms are required for accurate c...
Yan Meng, Andrew P. Brown, Ronald A. Iltis, Timoth...
ICML
2009
IEEE
15 years 11 months ago
Large-scale deep unsupervised learning using graphics processors
The promise of unsupervised learning methods lies in their potential to use vast amounts of unlabeled data to learn complex, highly nonlinear models with millions of free paramete...
Rajat Raina, Anand Madhavan, Andrew Y. Ng