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HPCA
2008
IEEE
16 years 7 days ago
An OS-based alternative to full hardware coherence on tiled CMPs
The interconnect mechanisms (shared bus or crossbar) used in current chip-multiprocessors (CMPs) are expected to become a bottleneck that prevents these architectures from scaling...
Christian Fensch, Marcelo Cintra
ICWS
2009
IEEE
15 years 9 months ago
RDF Data-Centric Storage
—The vision of the Semantic Web has brought about new challenges at the intersection of web research and data management. One fundamental research issue at this intersection is t...
Justin J. Levandoski, Mohamed F. Mokbel
ICDM
2003
IEEE
184views Data Mining» more  ICDM 2003»
15 years 5 months ago
Analyzing High-Dimensional Data by Subspace Validity
We are proposing a novel method that makes it possible to analyze high dimensional data with arbitrary shaped projected clusters and high noise levels. At the core of our method l...
Amihood Amir, Reuven Kashi, Nathan S. Netanyahu, D...
DATE
2010
IEEE
125views Hardware» more  DATE 2010»
15 years 5 months ago
pSHS: A scalable parallel software implementation of Montgomery multiplication for multicore systems
—Parallel programming techniques have become one of the great challenges in the transition from single-core to multicore architectures. In this paper, we investigate the parallel...
Zhimin Chen, Patrick Schaumont
DT
2006
113views more  DT 2006»
14 years 12 months ago
The Challenges of Synthesizing Hardware from C-Like Languages
at their abstractions are similar to data types and operations supplied by conventional processors. A core principle of BCPL is its memory model: an The Challenges of Synthesizing ...
Stephen A. Edwards