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IRI
2007
IEEE
15 years 6 months ago
A Reference Framework for Requirements and Architecture in Biomedical Grid Systems
In this paper we introduce the work done to define a framework for requirements and architectural understanding in biomedical grid computing systems. A set of core requirements fo...
Chris Mattmann, Vito Perrone, Sean C. Kelly, Danie...
CODES
2006
IEEE
15 years 6 months ago
Layout aware design of mesh based NoC architectures
Design of System-on-Chip (SoC) with regular mesh based Network-on-Chip (NoC) consists of mapping processing cores to routers, and routing of the traffic traces on the topology suc...
Krishnan Srinivasan, Karam S. Chatha
IPPS
2006
IEEE
15 years 5 months ago
Analysis of a reconfigurable network processor
In this paper an analysis of a dynamically reconfigurable processor is presented. The network processor incorporates a processor and a number of coprocessors that can be connected...
Christopher Kachris, Stamatis Vassiliadis
ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
15 years 5 months ago
Interconnect-Aware Coherence Protocols for Chip Multiprocessors
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
Liqun Cheng, Naveen Muralimanohar, Karthik Ramani,...
CASES
2006
ACM
15 years 5 months ago
A dynamic code placement technique for scratchpad memory using postpass optimization
In this paper, we propose a fully automatic dynamic scratchpad memory (SPM) management technique for instructions. Our technique loads required code segments into the SPM on deman...
Bernhard Egger, Chihun Kim, Choonki Jang, Yoonsung...