Sciweavers

879 search results - page 165 / 176
» Core schema mappings
Sort
View
DAC
2003
ACM
15 years 10 months ago
Optimal integer delay budgeting on directed acyclic graphs
Delay budget is an excess delay each component of a design can tolerate under a given timing constraint. Delay budgeting has been widely exploited to improve the design quality. W...
Elaheh Bozorgzadeh, Soheil Ghiasi, Atsushi Takahas...
CAV
2009
Springer
215views Hardware» more  CAV 2009»
15 years 10 months ago
Homer: A Higher-Order Observational Equivalence Model checkER
We present HOMER, an observational-equivalence model checker for the 3rd-order fragment of Idealized Algol (IA) augmented with iteration. It works by first translating terms of the...
David Hopkins, C.-H. Luke Ong
OSDI
2008
ACM
15 years 10 months ago
Hardware Enforcement of Application Security Policies Using Tagged Memory
Computers are notoriously insecure, in part because application security policies do not map well onto traditional protection mechanisms such as Unix user accounts or hardware pag...
Nickolai Zeldovich, Hari Kannan, Michael Dalton, C...
114
Voted
KES
2007
Springer
15 years 3 months ago
Inductive Concept Retrieval and Query Answering with Semantic Knowledge Bases Through Kernel Methods
This work deals with the application of kernel methods to structured relational settings such as semantic knowledge bases expressed in Description Logics. Our method integrates a n...
Nicola Fanizzi, Claudia d'Amato
ANCS
2005
ACM
15 years 3 months ago
Framework for supporting multi-service edge packet processing on network processors
Network edge packet-processing systems, as are commonly implemented on network processor platforms, are increasingly required to support a rich set of services. These multi-servic...
Arun Raghunath, Aaron R. Kunze, Erik J. Johnson, V...