Third generation’s wireless communications systems comprise advanced signal processing algorithms that increase the computational requirements more than ten-fold over 2G’s sys...
Heiko Michel, Alexander Worm, Norbert Wehn, Michae...
Dynamic reconfiguration allows to selectively substitute blocks of logic at run-time in order to improve the area efficiency of a FPGA design. This paper presents the design of a ...
- The use of reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such cores are being used for their flexibility, powerful functionality and low ...
Abstract. This paper presents a new hybrid split-and-merge image segmentation method based on computational geometry and topology using persistent homology. The algorithm uses edge...
Multi-processor architectures have gained interest recently because of their ability to exploit programmable silicon parallelism at acceptable power-efficiency figures. Despite th...