Sciweavers

879 search results - page 91 / 176
» Core schema mappings
Sort
View
DATE
2002
IEEE
161views Hardware» more  DATE 2002»
15 years 4 months ago
Hardware/Software Trade-Offs for Advanced 3G Channel Coding
Third generation’s wireless communications systems comprise advanced signal processing algorithms that increase the computational requirements more than ten-fold over 2G’s sys...
Heiko Michel, Alexander Worm, Norbert Wehn, Michae...
ASAP
2007
IEEE
130views Hardware» more  ASAP 2007»
15 years 3 months ago
A Self-Reconfigurable Implementation of the JPEG Encoder
Dynamic reconfiguration allows to selectively substitute blocks of logic at run-time in order to improve the area efficiency of a FPGA design. This paper presents the design of a ...
Antonino Tumeo, Matteo Monchiero, Gianluca Palermo...
ASPDAC
2007
ACM
122views Hardware» more  ASPDAC 2007»
15 years 3 months ago
A Novel Reconfigurable Low Power Distributed Arithmetic Architecture for Multimedia Applications
- The use of reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such cores are being used for their flexibility, powerful functionality and low ...
Zhenyu Liu, Tughrul Arslan, Ahmet T. Erdogan
CAIP
2007
Springer
170views Image Analysis» more  CAIP 2007»
15 years 3 months ago
Image Segmentation Using Topological Persistence
Abstract. This paper presents a new hybrid split-and-merge image segmentation method based on computational geometry and topology using persistent homology. The algorithm uses edge...
David Letscher, Jason Fritts
FPL
2006
Springer
115views Hardware» more  FPL 2006»
15 years 3 months ago
Executing Hardware as Parallel Software for Picoblaze Networks
Multi-processor architectures have gained interest recently because of their ability to exploit programmable silicon parallelism at acceptable power-efficiency figures. Despite th...
Pengyuan Yu, Patrick Schaumont