Sciweavers

548 search results - page 12 / 110
» Core-Selectability in Chip Multiprocessors
Sort
View
PCI
2005
Springer
15 years 5 months ago
TSIC: Thermal Scheduling Simulator for Chip Multiprocessors
Abstract. Increased power density, hot-spots, and temperature gradients are severe limiting factors for today’s state-of-the-art microprocessors. However, the flexibility offer...
Kyriakos Stavrou, Pedro Trancoso
GLVLSI
2010
IEEE
141views VLSI» more  GLVLSI 2010»
14 years 12 months ago
Energy-efficient redundant execution for chip multiprocessors
Relentless CMOS scaling coupled with lower design tolerances is making ICs increasingly susceptible to wear-out related permanent faults and transient faults, necessitating on-chi...
Pramod Subramanyan, Virendra Singh, Kewal K. Saluj...
JSA
2008
91views more  JSA 2008»
14 years 11 months ago
Using supplier locality in power-aware interconnects and caches in chip multiprocessors
Conventional snoopy-based chip multiprocessors take an aggressive approach broadcasting snoop requests to all nodes. In addition each node checks all received requests. This appro...
Ehsan Atoofian, Amirali Baniasadi
DATE
2009
IEEE
109views Hardware» more  DATE 2009»
15 years 6 months ago
Improving yield and reliability of chip multiprocessors
— An increasing number of hardware failures can be attributed to device reliability problems that cause partial system failure or shutdown. In this paper we propose a scheme for ...
Abhisek Pan, Omer Khan, Sandip Kundu
DAC
2007
ACM
16 years 20 days ago
Chip Multi-Processor Generator
The drive for low-power, high performance computation coupled with the extremely high design costs for ASIC designs, has driven a number of designers to try to create a flexible, ...
Alex Solomatnikov, Amin Firoozshahian, Wajahat Qad...