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» Core-Selectability in Chip Multiprocessors
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FPL
2007
Springer
146views Hardware» more  FPL 2007»
15 years 5 months ago
Efficient External Memory Interface for Multi-processor Platforms Realized on FPGA Chips
The complexity of today’s embedded applications requires modern high-performance embedded System-on-Chip (SoC) platforms to be multiprocessor architectures. Advances in FPGA tec...
Hristo Nikolov, Todor Stefanov, Ed F. Deprettere
DATE
2009
IEEE
127views Hardware» more  DATE 2009»
15 years 6 months ago
Process variation aware thread mapping for Chip Multiprocessors
Abstract—With the increasing scaling of manufacturing technology, process variation is a phenomenon that has become more prevalent. As a result, in the context of Chip Multiproce...
Shengyan Hong, Sri Hari Krishna Narayanan, Mahmut ...
PDP
2009
IEEE
15 years 6 months ago
Phoenix: A Runtime Environment for High Performance Computing on Chip Multiprocessors
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...
Avneesh Pant, Hassan Jafri, Volodymyr V. Kindraten...
DATE
2009
IEEE
138views Hardware» more  DATE 2009»
15 years 6 months ago
Hardware/software co-design architecture for thermal management of chip multiprocessors
—The sustained push for performance, transistor count, and instruction level parallelism has reached a point where chip level power density issues are at the forefront of design ...
Omer Khan, Sandip Kundu
ISQED
2010
IEEE
103views Hardware» more  ISQED 2010»
15 years 5 months ago
Thermal-aware job allocation and scheduling for three dimensional chip multiprocessor
- In this paper, we propose a thermal-aware job allocation and scheduling algorithm for three-dimensional (3D) chip multiprocessor (CMP). The proposed algorithm assigns hot jobs to...
Shaobo Liu, Jingyi Zhang, Qing Wu, Qinru Qiu