548 search results - page 16 / 110 » Core-Selectability in Chip Multiprocessors |
106
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ISHPC
1999
Springer
15 years 4 months ago
1999
Springer
On-chip multiprocessor can be an alternative to the wide-issue superscalar processor approach which is currently the mainstream to exploit the increasing number of transistors on ...
CODES
2005
IEEE
15 years 1 months ago
2005
IEEE
We propose a secure platform on a chip multiprocessor, known as FIDES, in order to enable next generation mobile terminals to execute downloaded native applications for Linux. Its...
IEEEPACT
2006
IEEE
15 years 5 months ago
2006
IEEE
Previous studies have demonstrated the advantages of single-ISA heterogeneous multi-core architectures for power and performance. However, none of those studies examined how to de...
105
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ASPLOS
1998
ACM
15 years 4 months ago
1998
ACM
Thread-level speculation is a technique that enables parallel execution of sequential applications on a multiprocessor. This paper describes the complete implementation of the sup...
AINA
2008
IEEE
15 years 6 months ago
2008
IEEE
—This work tries to derive ideas for thread allocation in Chip Multiprocessor (CMP)-based network processors performing general applications by Continuous-Time Markov Chain model...