548 search results - page 74 / 110 » Core-Selectability in Chip Multiprocessors |
120
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SPAA
2005
ACM
15 years 9 months ago
2005
ACM
This paper shows for the first time that elimination, a scaling technique formerly applied only to counters and LIFO structures, can be applied to FIFO data structures, specific...
136
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ISCA
2003
IEEE
15 years 9 months ago
2003
IEEE
We describe the Java runtime parallelizing machine (Jrpm), a complete system for parallelizing sequential programs automatically. Jrpm is based on a chip multiprocessor (CMP) with...
112
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HPCA
1996
IEEE
15 years 8 months ago
1996
IEEE
The current multiprocessors such asCray T3D support interprocessor communication using partitioned dimension-order routers (PDRs). In a PDR implementation, the routing logic and sw...
184
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FPL
2006
Springer
15 years 7 months ago
2006
Springer
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
110
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DATE
2009
IEEE
15 years 10 months ago
2009
IEEE
This paper presents a novel technique for the modeling, simulation, and analysis of real-time applications on MultiProcessor Systems-on-Chip (MPSoCs). This technique is based on a...